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| IEEE 1284 Parallel Port ESD/EMI/Termination Network PACSZ1284 Features * * 17 EMI filters 17 ESD protectors yielding protection to 30kV contact discharge, per IEC 61000-4-2 specification 17 terminators with choice of resistor values 28-pin QSOP package RoHS compliant (lead-free) finishing Product Description The PACSZ1284 combines EMI filtering, ESD protection, and signal termination in a single QSOP package for parallel port interfaces complying to the IEEE 1284 standard. The PACSZ1284 provides a complete parallel port termination solution. It integrates the equivalent of 60 discrete components, making it ideal for space critical applications. The pins of the device which connect to the parallel port are protected to 30kV contact discharge, well beyond Level 4 of the IEC 61000-4-2 specification. All other pins are ESD-protected for contact discharges up to 8kV per IEC 61000-4-2. There are two values available for pull-up resistor R1. For the PACSZ1284-02, R1 = 2.2k; for the PACSZ1284-04, R1 = 4.7k. The PACSZ1284 is housed in a 28-pin QSOP package and is available with RoHS compliant leadfree finishing. * * * Applications * Parallel Ports of PCs, printers, peripherals, and Set-Top Boxes Electrical Schematic P ACSZ1284-02 R1 = 2.2k! R2 = 33! C = 150pF P ACSZ1284-04 R1 = 4.7k! R2 = 33! C = 150pF (c)2010 SCILLC. All rights reserved. May 2010 Rev. 3 Publication Order Number: PACSZ1284/D PACSZ1284 PIN DESCRIPTIONS LEADS 1,2,8,10, 12,15, 27,28 3-7, 9,11, 13,14 16-19, 21, 23-26 20 22 NAME Capacitor-filtered Super I/O Chip side seriesterminated Parallel Port connector side series-terminated VCC GND DESCRIPTION IEEE 1284 signals which require no series termination. IEEE 1284 signals on the Super I/O Chip side which require series termination. IEEE 1284 signals on the Parallel Port Connector side which require series termination. Supply rail for the device Ground reference for the device Rev. 3 | Page 2 of 11 | www.onsemi.com PACSZ1284 Ordering Information STANDARD VALUES RC Code 02 04 R1 () 2.2k 4.7k R2 () 33 33 C (pF) 150 150 PART NUMBERING INFORMATION RC Code 02 04 Pins 28 28 Package QSOP QSOP Ordering Part Number1 PACSZ1284-02QR PACSZ1284-04QR Part Marking PACSZ1284 02QR PACSZ128404QR Note 1: Parts are shipped in Tape & Reel form unless otherwise specified. Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER VCC Voltage Input Voltage Range, no clamping Storage Temperature Range Power Dissipation per Resistor Package Power Dissipation RATING 5.5 -0.4 to 5.5 -40 to +150 0.1 1.0 UNITS V V C W W STANDARD OPERATING CONDITIONS PARAMETER VCC Voltage Operating Temperature RATING 5.0 -40 to +85 UNITS V C Rev. 2 | Page 3 of 11 | www.onsemi.com PACSZ1284 ELECTRICAL OPERATING CHARACTERISTICS SYMBOL TOLR TOLC PARAMETER Absolute Resistance Tolerance Absolute Capacitance Tolerance CONDITIONS Measured at TA=25C Measured at 1MHz, 2.5VDC, TA=25C Measured at 5.0VDC, TA=25C Pins 3,4,5,6,7,9,11,13, & 14, per IEC 61000-4-2 specification, Notes 1 and 2 Pins 1,2,8,10,12,15,16,17,18,19, 21,23,24,25,26,27, & 28, per IEC 61000-4-2 specification Notes 1 and 3 ESD applied to connector pin, measured at corresponding input pin; +8kV discharge, Human Body Model Note 1 ESD applied to connector pin, measured at corresponding input pin; -8kV discharge, Human Body Model; Note 1 +8 1 MIN TYP MAX +20 +20 UNITS % % ILEAK VESDi Leakage current to GND ESD protection, input pins 10 A kV VESD ESD protection, connector pins +30 kV VCLAMP Clamping voltage under ESD discharge 8.3 V -2.7 V Note 1:ESD voltage applied between Input/Connector pins and ground, one pin at a time. Note 2:Pins 3-7, 9, 11, 13, and 14 typically connect to the I/O pins of a Super I/O chip. Note 3:Pins 1, 2, 8, 10, 12, 15-19, 21, and 23-28 typically connect to the Parallel Port connector. Rev. 3 | Page 4 of 11 | www.onsemi.com PACSZ1284 Performance Information Filter Capacitors The IEEE 1284 specification requires both termination and EMI filtering on a total of 17 lines. Basic filtering is provided through the presence of a capacitor on all signal lines. The filter capacitor is the junction capacitance of an ESD diode. The typical capacitance at a reverse voltage of 2.5V is 150pF. This diode capacitance is somewhat voltage dependent. See Figure . Figure 1. Diode Capacitance vs. Reverse Voltage The higher speed Data and Strobe lines (9 in total) require an additional series resistor termination for proper operation, while the eight (8) Status lines do not. See Table 1. Rev. 2 | Page 5 of 11 | www.onsemi.com PACSZ1284 Filter Insertion Loss Figure 2 shows the typical Insertion Loss graphs of the PACSZ1284 for Data and Strobe signals. The curves are dependent on the physical location of the filter elements with respect to the ground terminal of this device. These graphs are measured in a 50 environment on a Hewlett Packard HP 8753C Analyzer. The signal source is introduced at the resistor input and the output is measured at the corresponding protection diode. The actual pins measured are labeled in the Figure 2 graph. Figure 2. Typical Filter Insertion Loss Rev. 3 | Page 6 of 11 | www.onsemi.com PACSZ1284 Application Information Termination Considerations The IEEE 1284 specification requires both termination and EMI filtering on a total of 17 signal lines. Control and Status lines (8 in total) only require a pull-up resistor and a filter capacitor. The Data lines and Strobe also require a series termination resistor in addition to the pull-up resistors and filter capacitors. See Table 1, in conjunction with the schematic diagram on page 1. Table 1: IEEE 1284 Termination Requirements SIGNAL TERMINATION REQUIREMENTS Signal Name Data1 - Data8 Strobe Init AutoFeedXT Selectin ACK Busy Paper Empty Select Fault Series Termination Yes Yes Not Required Not Required Not Required Not Required Not Required Not Required Not Required Not Required Rev. 2 | Page 7 of 11 | www.onsemi.com PACSZ1284 Interfacing to IEEE 1284 Connectors IEEE 1284 defines three interface connectors: * 1284 A is a 25-pin DB series connector which is the de facto PC standard for the host connection. * 1284 B is a 36-pin, 0.085 inch centerline connector used on the peripheral device. * 1284 C is a new 36-pin, 0.050 inch centerline connector which can be used for both host and peripheral. Figure 3A shows a possible hook-up between the 1284-A connector on a PC motherboard and the PACSZ1284, illustrating how the pin configuration of the PACSZ1284 allows for easy interconnect between the two. The dotted I/O signals of the PACSZ1284 will typically be connected to a Super I/O chip on the motherboard. Figure 3B shows a possible hook-up between the 1284-B connector on a peripheral and the PACSZ1284. Figure 3C shows a possible hook-up between the 1284-C connector and the PACSZ1284. Figure 3. Example Connections of IEEE 1284 Connectors with PACSZ1284 Table 2 provides the IEEE 1284 signal assignments for the three connectors, and example PACSZ1284 pin connections. When connecting a 1284-A host to a 1284-B peripheral, the "Peripheral Logic High" signal is not used. Similarly, when a 1284-A host is connected to a 1284-C peripheral, the "Peripheral Logic High" and "Host Logic High" are not used. These two signals are optionally used to detect a "Power Off" or "Cable Disconnect" state for host and peripheral, respectively. Rev. 3 | Page 8 of 11 | www.onsemi.com PACSZ1284 Table 2: IEEE 1284 Connector Pinouts and PACSZ1284 Connection Guidelines PACSZ1284 PIN TYPE 1284-A 25-PIN DSUB SIGNAL PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 STROBE Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 ACK BUSY PError Select AUTOFD FAULT INIT Selectin Ground Ground Ground Ground Ground Ground Ground Ground 1284-B 36-PIN CHAMP SIGNAL STROBE Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 ACK BUSY PError Select AUTOFD FAULT INIT Selectin Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Not Defined Not Defined Not Defined Not Defined Logic Ground Chassis GND Peripheral Logic 1284-C 36-PIN HIGH DENSITY SIGNAL STROBE Data 1 Data 2 Data 3 Data 4 Data 5 Data 6 Data 7 Data 8 ACK BUSY PError Select AUTOFD FAULT INIT Selectin Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Ground Not Required Host Logic High PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 32 31 36 19 20 21 22 23 24 25 26 27 28 29 30 33 34 35 15 16 17 18 PIN 15 6 7 8 9 10 11 12 13 3 1 5 2 17 4 14 16 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 18 P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) P-Port conn. side, series-terminated (16-19, 21, or 23-26) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Capacitor-filtered (1, 2, 8, 10, 12, 15, 27, or 28) Rev. 2 | Page 9 of 11 | www.onsemi.com PACSZ1284 Mechanical Details QSOP-28 Mechanical Specifications, 28 pin The PACSZ1284 is supplied in a 28-pin QSOP package. Dimensions are presented below. For complete information on the QSOP-28, see the California Micro Devices QSOP Package Information document. PACKAGE DIMENSIONS Package Pins Millimeters Dimensions Min A A1 B C D E e H L # per tube # per tape and reel 1.35 0.10 0.20 0.18 9.80 3.81 Max 1.75 0.25 0.30 0.25 9.98 3.98 Min 0.053 0.004 0.008 0.007 0.386 0.150 Max 0.069 0.010 0.012 0.010 0.393 0.157 QSOP (JEDEC name is SSOP) 28 Inches 0.64 BSC 5.79 0.40 6.20 1.27 0.025 BSC 0.228 0.016 0.244 0.050 50 pieces* 2500 pieces Controlling Dimensions: millimeters * This is an approximate amount which may vary. Dimensions for QSOP-28 Package Rev. 3 | Page 10 of 11 | www.onsemi.com PACSZ1284 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION L I T ERA TURE FU L F I L L M EN T : Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA P h o ne: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Emai l: orderlit@onsemi.com N. American Tec h n ical S u p p ort: 800-282-9855 Toll Free USA/Canada E uro pe , M i d d le East an d Africa Tec h n ical S u p p ort: Phone: 421 33 790 2910 Japa n C ust o mer F oc us Ce nter Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative Rev. 2 | Page 11 of 11 | www.onsemi.com |
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